182 lines
6.2 KiB
C
182 lines
6.2 KiB
C
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/*
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* Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved.
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*/
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#ifndef __NFC_COMMON_H__
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#define __NFC_COMMON_H__
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/*****************************************************************************/
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#include <asm/io.h>
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#include <common.h>
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#include <linux/mtd/nand.h>
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#include <match_table.h>
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#include <fmc_common.h>
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/*****************************************************************************/
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#define _512B 512
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#define _2K 2048
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#define _4K 4096
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#define _8K 8192
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#define _16K 16384
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/*****************************************************************************/
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#define NAND_PAGE_512B 0
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#define NAND_PAGE_1K 1
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#define NAND_PAGE_2K 2
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#define NAND_PAGE_4K 3
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#define NAND_PAGE_8K 4
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#define NAND_PAGE_16K 5
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#define NAND_PAGE_32K 6
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/*****************************************************************************/
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#define NAND_ECC_NONE 0
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#define NAND_ECC_0BIT 0
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#define NAND_ECC_1BIT 1
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#define NAND_ECC_1BIT_512 1
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#define NAND_ECC_4BIT 2
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#define NAND_ECC_4BIT_512 2
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#define NAND_ECC_4BYTE 2
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#define NAND_ECC_8BIT 2
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#define NAND_ECC_8BIT_512 3
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#define NAND_ECC_8BYTE 3
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#define NAND_ECC_13BIT 4
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#define NAND_ECC_16BIT 5
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#define NAND_ECC_18BIT 6
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#define NAND_ECC_24BIT 7
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#define NAND_ECC_27BIT 8
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#define NAND_ECC_28BIT 9
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#define NAND_ECC_32BIT 10
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#define NAND_ECC_40BIT 11
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#define NAND_ECC_41BIT 12
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#define NAND_ECC_42BIT 13
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#define NAND_ECC_48BIT 14
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#define NAND_ECC_60BIT 15
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#define NAND_ECC_64BIT 16
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#define NAND_ECC_72BIT 17
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#define NAND_ECC_80BIT 18
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#define ERSTR_HARDWARE "Hardware configuration error."
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#define ERSTR_DRIVER "Driver does not support."
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#define DISABLE 0
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#define ENABLE 1
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#define is_randomizer(_dev) ((_dev)->flags & NAND_RANDOMIZER)
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#define is_hw_auto(_dev) ((_dev)->flags & NAND_HW_AUTO)
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#define is_synchronous(_dev) ((_dev)->flags & NAND_SYNCHRONOUS)
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#define is_config_done(_dev) ((_dev)->flags & NAND_CONFIG_DONE)
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#define is_synchronous_boot(_dev) ((_dev)->flags & NAND_SYNCHRONOUS_BOOT)
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#define NAND_PAGE_SHIFT 9 /* 512 */
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#if defined(CONFIG_FMC_SPI_NAND) || defined(CONFIG_FMC_NAND)
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/*****************************************************************************/
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enum ecc_type {
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ET_ECC_NONE = 0x00,
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ET_ECC_1BIT = 0x01,
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ET_ECC_4BIT = 0x02,
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ET_ECC_8BIT = 0x03,
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ET_ECC_24BIT1K = 0x04,
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ET_ECC_40BIT1K = 0x05,
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ET_ECC_64BIT1K = 0x06,
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};
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enum page_type {
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PT_PAGESIZE_512 = 0x00,
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PT_PAGESIZE_2K = 0x01,
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PT_PAGESIZE_4K = 0x02,
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PT_PAGESIZE_8K = 0x03,
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PT_PAGESIZE_16K = 0x04,
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};
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struct nand_config_info {
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unsigned int pagetype;
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unsigned int ecctype;
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unsigned int oobsize;
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struct nand_ecclayout *layout;
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};
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struct nfc_host;
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struct read_retry_t {
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int type;
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int count;
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int (*set_rr_param)(struct nfc_host *host, int param);
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int (*get_rr_param)(struct nfc_host *host);
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int (*reset_rr_param)(struct nfc_host *host);
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int (*enable_enhanced_slc)(struct nfc_host *host, int enable);
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};
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#endif
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/*****************************************************************************/
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struct nand_flash_dev_ex {
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struct nand_flash_dev flash_dev;
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char *start_type;
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unsigned char ids[8]; /* 8Byte */
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int oobsize;
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int ecctype;
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#define NAND_RANDOMIZER 0x01 /* nand chip need randomizer */
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#define NAND_HW_AUTO 0x02 /* controller support hardware auto config */
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#define NAND_SYNCHRONOUS 0x04 /* nand chip support synchronous */
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#define NAND_ASYNCHRONOUS 0x08 /* nand chip support asynchronous */
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#define NAND_SYNCHRONOUS_BOOT 0x10 /* nand boot from synchronous mode */
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#define NAND_CONFIG_DONE 0x20 /* current controller config finish */
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int flags;
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int is_randomizer;
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#define NAND_RR_NONE 0x00
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#define NAND_RR_HYNIX_BG_BDIE 0x10
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#define NAND_RR_HYNIX_BG_CDIE 0x11
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#define NAND_RR_HYNIX_CG_ADIE 0x12
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#define NAND_RR_MICRON 0x20
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#define NAND_RR_SAMSUNG 0x30
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#define NAND_RR_TOSHIBA_24NM 0x40
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#define NAND_RR_TOSHIBA_19NM 0x41
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#define NAND_RR_MASK 0xF0
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int read_retry_type;
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int hostver; /* host controller version. */
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};
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/*****************************************************************************/
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const char *nand_ecc_name(int type);
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const char *nand_page_name(int type);
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int nandpage_size2type(int size);
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int nandpage_type2size(int size);
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/*****************************************************************************/
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extern int nand_get_ecctype(void);
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extern struct nand_flash_dev *(*get_flash_type)(struct mtd_info *mtd,
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struct nand_chip *chip, unsigned char *id);
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extern int (*nand_oob_resize)(struct mtd_info *mtd);
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/*****************************************************************************/
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extern unsigned char match_ecc_type_to_yaffs(unsigned char type);
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extern unsigned char match_page_reg_to_type(unsigned char reg);
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extern unsigned char match_page_type_to_reg(unsigned char type);
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extern const char *match_page_type_to_str(unsigned char type);
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/*****************************************************************************/
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extern unsigned char match_ecc_reg_to_type(unsigned char reg);
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extern unsigned char match_ecc_type_to_reg(unsigned char type);
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extern const char *match_ecc_type_to_str(unsigned char type);
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/*****************************************************************************/
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extern unsigned char match_page_size_to_type(unsigned int size);
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extern unsigned int match_page_type_to_size(unsigned char type);
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#endif /* End of __NFC_COMMON_H__ */
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