80 lines
2.6 KiB
C
Executable File
80 lines
2.6 KiB
C
Executable File
/*
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* Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved.
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*/
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/*****************************************************************************/
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#define SPI_CMD_FIRST_RESET_4ADDR 0x66
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#define SPI_CMD_SECOND_RESET_4ADDR 0x99
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#define SPI_CMD_FLAG_SR_MICRON 0x70 /* READ FLAG STATUS REGISTER */
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#define SPI_CMD_RD_RDCR_MICRON 0xB5 /* READ NONVOLATILE CONFIGURATION
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REGISTER */
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#define SPI_CMD_WR_RDCR_MICRON 0xB1 /* WRITE NONVOLATILE CONFIGURATION
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REGISTER */
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#define SPI_NOR_ADS_MASK 0x1
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#define spi_nor_get_4byte_by_flag_sr(sr) ((sr) & SPI_NOR_ADS_MASK)
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#define spi_nor_ads_set_4byte(cr) ((cr) & (~SPI_NOR_ADS_MASK))
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#define spi_nor_ads_get_4byte(cr) ((cr) & SPI_NOR_ADS_MASK)
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/****************************************************************************/
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static int spi_micron_entry_4addr(struct fmc_spi *spi, int enable)
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{
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unsigned char status;
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unsigned int reg;
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const char *str[] = {"Disable", "Enable"};
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struct fmc_host *host = (struct fmc_host *)spi->host;
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fmc_pr(AC_DBG, "\t* Start SPI Nor %s 4-byte mode.\n",
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str[enable]);
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if (spi->addrcycle != SPI_NOR_4BYTE_ADDR_LEN) {
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fmc_pr(AC_DBG, "\t* Not support 4B mode.\n");
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return 0;
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}
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status = spi_general_get_flash_register(spi, SPI_CMD_FLAG_SR_MICRON);
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fmc_pr(AC_DBG, "\t Read flag status register[%#x]:%#x\n",
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SPI_CMD_FLAG_SR_MICRON, status);
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if (spi_nor_get_4byte_by_flag_sr(status) == enable) {
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fmc_pr(AC_DBG, "\t* 4-byte was %sd, reg:%#x\n", str[enable],
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status);
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return 0;
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}
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spi->driver->write_enable(spi);
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if (enable)
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reg = SPI_CMD_EN4B;
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else
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reg = SPI_CMD_EX4B;
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fmc_write(host, FMC_CMD, fmc_cmd_cmd1(reg));
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fmc_pr(AC_DBG, "\t Set CMD[%#x]%#x\n", FMC_CMD, reg);
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reg = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN;
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fmc_write(host, FMC_OP_CFG, reg);
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fmc_pr(AC_DBG, "\t Set OP_CFG[%#x]%#x\n", FMC_OP_CFG, reg);
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reg = fmc_op_cmd1_en(ENABLE) | FMC_OP_REG_OP_START;
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fmc_write(host, FMC_OP, reg);
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fmc_pr(AC_DBG, "\t Set OP[%#x]%#x\n", FMC_OP, reg);
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fmc_cmd_wait_cpu_finish(host);
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spi->driver->wait_ready(spi);
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status = spi_general_get_flash_register(spi,
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SPI_CMD_FLAG_SR_MICRON);
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fmc_pr(AC_DBG, "\t Read flag status register[%#x]:%#x\n",
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SPI_CMD_FLAG_SR_MICRON, status);
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if (spi_nor_get_4byte_by_flag_sr(status) != enable) {
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db_msg("Error: %s 4-byte failed! SR3:%#x\n",
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str[enable], status);
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return status;
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}
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fmc_pr(AC_DBG, "\t %s 4-byte success, SR3:%#x\n", str[enable], status);
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fmc_pr(AC_DBG, "\t* End SPI Nor flash %s 4-byte mode.\n", str[enable]);
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return 0;
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}
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