157 lines
3.3 KiB
C
Executable File
157 lines
3.3 KiB
C
Executable File
/*
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* Copyright (c) Hunan Goke,Chengdu Goke,Shandong Goke. 2021. All rights reserved.
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*/
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#include <config.h>
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#include <linux/kconfig.h>
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#include <asm/io.h>
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#include <compiler.h>
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#include <cpu_common.h>
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extern unsigned int hw_dec_type;
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extern void hw_dec_init(void);
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extern int hw_dec_decompress(unsigned char *dst, int *dstlen,
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unsigned char *src, int srclen,
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void *unused);
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extern void hw_dec_uinit(void);
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/******************************************************************************/
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const uintptr_t image_entry = (CONFIG_SYS_TEXT_BASE);
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/******************************************************************************/
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#define GZIP_SIZE_OFFSET 0x4
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#ifndef CONFIG_SYS_ICACHE_OFF
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/* Invalidate entire I-cache and branch predictor array */
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static void invalidate_icache_all(void)
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{
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/*
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* Invalidate all instruction caches to PoU.
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* Also flushes branch target cache.
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*/
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asm volatile("mcr p15, 0, %0, c7, c5, 0" : : "r"(0));
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/* Invalidate entire branch predictor array */
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asm volatile("mcr p15, 0, %0, c7, c5, 6" : : "r"(0));
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/* Full system DSB - make sure that the invalidation is complete */
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dsb();
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/* ISB - make sure the instruction stream sees it */
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isb();
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}
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#else
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static void invalidate_icache_all(void)
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{
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}
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#endif
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/******************************************************************************/
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void start_armboot(void)
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{
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unsigned char *pdst_l32 = NULL;
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unsigned int image_data_len;
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int pdst_len;
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int ret;
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int i;
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char *p = NULL;
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char *q = NULL;
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uart_early_init();
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uart_early_puts("\r\nUncompress ");
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/* use direct address mode */
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hw_dec_type = 0;
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/* init hw decompress IP */
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hw_dec_init();
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/* start decompress */
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pdst_l32 = (unsigned char *)(uintptr_t)image_entry;
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image_data_len = input_data_end - input_data;
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/* get dets length from compress image */
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p = (char *)&pdst_len;
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q = (char *)(input_data_end - GZIP_SIZE_OFFSET);
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for (i = 0; i < sizeof(int); i++)
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p[i] = q[i];
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ret = hw_dec_decompress(pdst_l32, &pdst_len, input_data, image_data_len, NULL);
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if (!ret) {
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uart_early_puts("Ok!");
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} else {
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uart_early_puts("Fail!");
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while (1) ;
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}
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/* uinit hw decompress IP */
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hw_dec_uinit();
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void (*uboot)(void);
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uboot = (void (*))CONFIG_SYS_TEXT_BASE;
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invalidate_icache_all();
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uboot();
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}
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void hang(void)
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{
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uart_early_puts("### ERROR ### Please RESET the board ###\n");
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for (;;) ;
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}
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void do_bad_sync(void)
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{
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uart_early_puts("bad sync abort\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_sync(void)
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{
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uart_early_puts("sync abort\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_bad_error(void)
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{
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uart_early_puts("bad error\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_error(void)
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{
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uart_early_puts("error\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_bad_fiq(void)
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{
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uart_early_puts("bad fast interrupt request\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_bad_irq(void)
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{
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uart_early_puts("bad interrupt request\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_fiq(void)
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{
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uart_early_puts("fast interrupt request\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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void do_irq(void)
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{
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uart_early_puts("interrupt request\r\n");
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uart_early_puts("Resetting CPU ...\r\n");
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reset_cpu(0);
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}
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